Intel puts out nine Lynnfield parts

Core i7, i5 and Xeon 3400s

AS WE SAID a few days ago, Intel is launching the new Lynnfield CPUs and the P55 chipset that goes with them. The CPU comes in three desktop flavors and six server variants.

The desktop parts are the i7 8xx, i5 7xx series, and the server parts are all labled Xeon 34xx. Desktop silicon uses the P55 chipset, the Xeons use either the 3400 or 3420 chipsets, all variants of the P55. The lineup looks like this.

Lynnfield specs table

The raw specs for Lynnfield

A few things to note here, first is that all of the CPUs have 8M of cache, and all but the L3426 have a 95W TDP. The L3426 uses only a mere 45 watts, and to make up for the low clock, has twice the number of ‘turbo’ bins available to it as the next one in line. 10 bins is not a typo, cool this one well, and it should fly. All turbo bins are 133MHz.

Other than the raw numbers, there are only two things that differentiate Lynnfield from Bloomfield, memory channels and sockets. Bloomfield, up till now the only i7 out there, has three channels of DDR3/1066, Lynnfield has two channels of DDR3/1333. If you stop and think about it, that gives Lynnfield 5/6ths of the memory bandwidth of Bloomfield, but lower latency. Then again, no one sticks to DDR3/1066 with an i7, so the point is somewhat academic. Let’s just say the two are very close on paper, and should be very close in the real world as well.

As far as sockets go, Bloomfield uses an LGA-1366 socket and only works with the X58 chipset. Lynnfield uses LGA-1156 along with the P55 chipset. The two are not compatible, even though both are called core i7. Core i7 8xx and i5 7xx all work with the P55 chipset, but not the X58.

Why would Intel do this? Because the i7 name means it has HT, i5 lacks HT. This brilliant idea adds to market confusion, user hardship, and general pain for retailers. This is a marketing move that should never have been proposed, much less implemented. The whole scheme will likely last for about six months until a new market niche forces Intel to abandon what minimal scraps of order the line had previously, just like it has done for the last 23 awful naming schemes. Why can’t Intel just simplify the lineup in a sensible way? AMD seems to have no problem with this concept.

Other than the peekaboo feature set and lack of a third memory channel, the basic Nehalem goodness is all there. They are damn fast, most have HT, all have an on board memory controller, huge caches, and fine grained power control. If you are familiar with the existing i7s, the new i7s and i5s will hold no surprises.

The chipset is quite different from both it’s predecessor, the P45, and it’s big brother, the X58. The raw specs on the P55 are about what you would expect, one 16x PCIe2 slot, usable as 2 8x if you choose, and 8 PCIe1.0 1x slots as well off the, umm, not south bridge.

P55 block diagram

P55 and Lynnfield block diagram

Here is where things get a bit interesting. Intel CPUs up until this point used the venerable Front Side Bus (FSB). While many think this is the connection between the CPU and chipset, it is not. The FSB is the connection to between the CPU and memory controller. Since the memory controller is now on the CPU, so is the FSB. This means the CPU connects to the external support chip, called Ibex Peak/P55, via another interface, DMI. DMI is a newer revision of what connected the northbridge and southbridge on the P45 chipset.

We are told this link is basically PCIe2.0 with some proprietary Intel messaging running across it, but nothing very special. There is another link called the Flexible Display Interface (FDI) that will be used to pass video data from the memory controller to the chipset, and back. The documentation SemiAccurate got on the subject was sadly lacking anything more than the names of the links. There was also no mention as to why the PCIe 16x lanes are shown as coming off the CPU package either.

The rest of the chipset is pretty well stocked for the enthusiast. The 8 PCIe lanes above are the starting point, it also has 6 SATA2 ports that allow for RAID levels 0/1/5/10, a feature that should be standard everywhere. On top of this there are 14 USB2 ports, a GigE NIC, and HD sound. There isn’t really anything lacking on the P55.

As of this writing, there was no literature on the Xeon side of things either. The only difference between the Cores and the Xeons we could find was ECC memory support. Any other changes to either the socket, chipsets or any thing else is likely minor at best.

Based on previews and the raw numbers, the differences between the Bloomfield i7s and the Lynnfield i7s and i5s should be pretty minor. Memory speed is likely greater on paper than in practice, and the two cores, when clocked the same, should be very close in performance. Bloomfield should win on bandwidth intensive tasks, Lynnfield on latency, but the 8MB cache should paper over most of the differences.

On CPU intensive work, the two cores should be almost indistinguishable, especially if the workload is fairly cache friendly. Because of the price difference between an Bloomfield and Lynnfield, the only reason to get the older part is the need for a second full PCIe2 16x lane.

Other than the unfortunate naming scheme, Lynnfield looks like a winner, the performance is within a hair of it’s bigger brother at a much friendlier price. The P55 chipset has enough ports to hook up a small data center, and supports faster RAM than the X58. What’s not to like?S|A

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Charlie Demerjian

Roving engine of chaos and snide remarks at SemiAccurate
Charlie Demerjian is the founder of Stone Arch Networking Services and is a technology news site; addressing hardware design, software selection, customization, securing and maintenance, with over one million views per month. He is a technologist and analyst specializing in semiconductors, system and network architecture. As head writer of, he regularly advises writers, analysts, and industry executives on technical matters and long lead industry trends. Charlie is also a council member with Gerson Lehman Group. FullyAccurate