Intel Larrabee, now called MIC, is now now called Xeon Phi. In a 22 page slide deck, Intel had three worthwhile data points, the Phi name, that it will ship with 8GB of GDDR5, and will have 1TF of DP performance. That is almost enough to catch it up to GPUs with half the die area on a -1 process node. The rest, 22nm, PCIe card, and discrete program running have all been previously disclosed. Multiple times. Over yet a higher multiple of slide pages.
SemiAccurate will spare you, the reader, the rather tortuous explanation of why Phi is, according to Intel, a brilliant name. Lets just say it is less pained than the iSomethingmeaningless bullsh*t, but equally useless. At least this one isn’t as user abusive. Yet. There is still time.
If you are wondering why we are taking yet another article to bash the mind-bogglingly awful Intel messaging, it is simply because they keep inflicting hour long briefings and slide decks lasting tens of pages without so much as a useful technical fact or two. The best we got was “>50 cores”, being hit on the head with a hammer imparts more insight than these pseudo-facts. Be still my beating heart. Luckily, we had an actual AMD technical talk to go to during that ‘briefing’, dodged that bullet. Come on Intel, you can do better, you really can’t do worse.S|A
Latest posts by Charlie Demerjian (see all)
- SemiAccurate has Skylake-SP die shots, sizes, and more - Jul 21, 2017
- Skylake-SP has a diverged core - Jul 19, 2017
- Intel’s Purley platform architecture is a step forward - Jul 13, 2017
- Intel launches Purley aka metal Xeons - Jul 11, 2017
- AMD’s Epyc has lots of connections - Jun 26, 2017