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  #341  
Old 01-10-2014, 11:39 AM
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Quote:
Originally Posted by gruffi View Post
Slow? Atom is slow, not Bulldozer.
It is slower than AMD would have liked though, which is what he's referring to.
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Old 01-10-2014, 12:20 PM
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Quote:
Originally Posted by gruffi View Post
Slow? Atom is slow, not Bulldozer.
It's sometimes slower than Deneb, a 2009 design. I call that slow.

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Originally Posted by gruffi View Post
There's no trace cache in Steamroller. There's only a loop buffer. Probably similar to what was implemented in Jaguar. AMD stated it's a power saving feature yet.
I think it works in a similar fashion, though I'm not sure. I hope AMD will discuss this at launch, or at least during ISSCC.

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Yes, in some old games because of the small dedicated L2 caches. That's still no argument to have an L3 in my opinion. Let's say Propus had a 2 or 4 MB shared L2. I think it would have been even faster than Deneb per clock, with better power consumption and ~200 mm˛ die size.
Maybe, but the problem is that AMD/GloFo can't seem to be able to make caches that are both fast and large.
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  #343  
Old 01-12-2014, 01:44 PM
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Quote:
Originally Posted by Alexko View Post
Maybe, but the problem is that AMD/GloFo can't seem to be able to make caches that are both fast and large.
Kaveri's L2 is quite large and fast. At least much faster than Deneb's L3. A significant improvement over Trinity/Richland.
  #344  
Old 01-14-2014, 04:46 PM
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http://support.amd.com/TechDocs/4741..._opt_guide.pdf

An updated SW opt. guide for F15h has surfaced. Now it contains models 30h-3Fh and also the range of 40h-4Fh.

It seems that the later ones feature HT and L3. Many things are wrong there but still some info can be useful.

Personally, I'm really curious about the stuff presented at bottom of page 197. A 16 core chip featuring 4 HT links and 3 PCIe 3.0 ones... strangely labeled as a member of the 30h-3Fh family.

Last edited by yuri; 01-14-2014 at 04:48 PM.
  #345  
Old 01-14-2014, 05:32 PM
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Anyone remember this news?
http://www.planet3dnow.de/cgi-bin/ne...?id=1368122313

Can someone find the "FP256" reference in the manual? The manual is now updated and any trace of this is gone... Or I'm looking at the wrong manual (which is possible).
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  #346  
Old 01-14-2014, 06:46 PM
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Anyone figure out what GH Latencies mean in the Software Optimization guide.
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Old 01-14-2014, 07:30 PM
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Quote:
Originally Posted by yuri View Post
Personally, I'm really curious about the stuff presented at bottom of page 197. A 16 core chip featuring 4 HT links and 3 PCIe 3.0 ones... strangely labeled as a member of the 30h-3Fh family.
http://i.imgur.com/9D90N6x.png

For those wanting a link to that picture.
Quote:
Originally Posted by cal_guy View Post
Anyone figure out what GH Latencies mean in the Software Optimization guide.
Locked Ops.

Last edited by Seronx; 01-14-2014 at 07:50 PM.
  #348  
Old 01-15-2014, 09:36 AM
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I believe that 8 CU (16 core) monolitic CPU is suited for 20nm manufacturing process
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  #349  
Old 02-17-2014, 03:05 AM
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Finally, I've found a proof of Carrizo being based at the current 28nm bulk GF process:
Quote:
28 nm (GF28A) Carrizo SoC
GF28A denotes to: "28nm Global Foundries bulk CMOS process"

http://www.linkedin.com/in/saketdoshi
  #350  
Old 02-17-2014, 04:21 AM
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"Carrizo SoC"

I remember seeing the Toronto variant lacking any mention of the FCH, which hinted that the SB would finally be integrated onto the chip itself. Leaked roadmaps still show Carrizo using the FCH for FM2+ understandably. Does this mean it's possible there could be an FM3 without the SB on the MOBO, which still could take FM2+ chips?
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