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  #71  
Old 07-19-2017, 02:23 AM
Melkhior Melkhior is offline
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Quote:
Originally Posted by Melkhior View Post
In fact, every 6xxx listed is 'XCC'
They still only list pre-release s-spec in:

Intel® Xeon® Processor Scalable Family

But if you look at QN34 page 23, it looks a lot like a Intel® Xeon® Gold 6128 Processor. And it's listed as XCC.

QMRN is probably the 5122 (QMRQ is the 8156, presumably), XCC as well.

Hopefully they will put the proper SKU in the next update.
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  #72  
Old 07-19-2017, 11:14 AM
aaronspink aaronspink is offline
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Quote:
Originally Posted by Melkhior View Post
I have an old (NDA) slide in front of me saying 'XCC' (yeah, I know, it's cheating :-) ). In fact, every 6xxx listed is 'XCC' (although not all of them are listed). Plus the 5122 is XCC, which is the only 5xxx with the second FMA.

... but my inference 2nd FMA == XCC isn't explicited.

What makes you think they are HCC beyond the lower core count?
Because without using the HCC die for them, the HCC die is severely under utilized. To the point that the only chips that would be using HCC would be skylake-x which doesn't make sense.

As for mixing -f and non-f, I'm not even sure that is really supported.
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  #73  
Old 07-19-2017, 11:41 AM
Melkhior Melkhior is offline
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Originally Posted by aaronspink View Post
Because without using the HCC die for them, the HCC die is severely under utilized. To the point that the only chips that would be using HCC would be skylake-x which doesn't make sense.
It is severely underutilized, core-wise. There is 4 cores Platinum, and those needs the third UPI from XCC, how much more underutilized can you get? All Gold 6xxx also need the third UPI BTW.

HCC/LCC are used by Gold 5xxx/Silver/Bronze, which is a large number of SKUs.

Quote:
As for mixing -f and non-f, I'm not even sure that is really supported.
It is. Or do you expect all OPA-using dual-socket systems to get two OPA links? It's way too expensive to be realistic. Also, Intel says it is supported.

And as for the 2nd FMA - apparently the expression is "diverged cores", if Charlie's latest article is to be believed. I wouldn't be surprised if the previously mentioned i9 was a stripped-down XCC as well, and that indeed only XCC gets the 2nd FMA.

Assuming a CPU uses the smallest die that would fit its number of cores is a bad idea. Intel has routinely deactivated large amount of cores to fit a specific kind of use case.
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Last edited by Melkhior; 07-19-2017 at 11:43 AM.
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  #74  
Old 07-19-2017, 02:28 PM
testbug00 testbug00 is offline
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While possible, it's unlikely that aaronspink knows less than other people on Intel server CPUs
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  #75  
Old 07-19-2017, 04:20 PM
Melkhior Melkhior is offline
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Originally Posted by testbug00 View Post
While possible, it's unlikely that aaronspink knows less than other people on Intel server CPUs
Personally, I trust the Intel documentation over some random internet poster, even on the S|A forum. I suggest you do the same and check my links - after all, I could be talking nonsense just as well.
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Last edited by Melkhior; 07-19-2017 at 04:35 PM.
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  #76  
Old 07-19-2017, 04:46 PM
Woolybully67 Woolybully67 is offline
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Thanks for all the info Melkhior. Makes Charlie's latest article all the more interesting. The segmentation of AVX appears kind of muddy, if my memory serves right features like that tend to only be used for very specific needs like super computing clusters or research projects where they get a lot of help from vendors (read: niche). I will be interested to see which CPU the cloud providers land on. One would think that is the peak of power/performance/thread for the family.

Just for reference, people have been waiting on AWS to make a decision one way or the other for a long time now. They are obviously one of the clients who have had Skylake in hand for a number of months and there still isn't a C5 instance type publicly available:
(Nov 2016) https://aws.amazon.com/about-aws/wha...zed-instances/
(May 2017) https://forums.aws.amazon.com/thread...hreadID=256078
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  #77  
Old 07-19-2017, 05:03 PM
Melkhior Melkhior is offline
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Quote:
Originally Posted by Woolybully67 View Post
if my memory serves right features like that tend to only be used for very specific needs like super computing clusters or research projects where they get a lot of help from vendors
Pretty much. Virtually no-one outside the HPC (high-performance computing, a.k.a. supercomputing) market needs the 2nd FMA. And even in that market, it only helps with some highly specific kind of workloads. Vendors (both Intel and the large OEMs, in particular the HPC-oriented ones) do have teams to help theirs customers tune their codes to the architecture. And with KNL and now SKX, it's more necessary than ever.

Quote:
I will be interested to see which CPU the cloud providers land on
Me too. I only have a limited understanding of that market, but if I was in charge, I would definitely thoroughly evaluate Epyc - to me the encrypted memory looks like a killer feature. And even for HPC, the extra two memory channels could be very, very useful. Unfortunately mine have been delayed, won't be able to play with one until mid-august at best :-(

The server CPU market is a lot more interesting now than it has been for a long time, thanks to Epyc shaking things up a bit. And if the ARM crowd finally delivers, 2018-2019 could be fun :-)
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