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  #901  
Old 05-26-2013, 01:55 AM
fellix fellix is offline
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Here's the original shot in much higher detail, with the data paths more distinguishable:

https://securecdn.disqus.com/uploads...9/original.jpg
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  #902  
Old 05-26-2013, 03:02 AM
Thrillseeker Thrillseeker is offline
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Quote:
Originally Posted by Seronx View Post
2x FMA + 2x MMX -> 4x FMA + 1x FMA/MMX + 1x MMX
Have you seen this referenced somewhere else?

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there no way that's steamroller, that has to be either a very good fake or EX.
Except it seems like an actual chip photo, not a CAD/CAM printout, and I find it hard to believe that silicon shots for EX have leaked already.
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Last edited by Thrillseeker; 05-26-2013 at 03:21 AM.
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  #903  
Old 05-26-2013, 04:14 AM
itsmydamnation itsmydamnation is offline
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Quote:
Originally Posted by Thrillseeker View Post
Except it seems like an actual chip photo, not a CAD/CAM printout, and I find it hard to believe that silicon shots for EX have leaked already.
I know, but AMD have detailed Steamroller at hot-chips last year and it looks nothing like this.
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  #904  
Old 05-26-2013, 04:46 AM
yuri yuri is offline
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Quote:
Originally Posted by itsmy************ation View Post
I know, but AMD have detailed Steamroller at hot-chips last year and it looks nothing like this.
Exactly. I've a hard time believing that they wouldn't say a word about such a monster FPU, 4AGU/ALU configuration, etc.
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  #905  
Old 05-26-2013, 05:19 AM
TESKATLIPOKA TESKATLIPOKA is offline
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Isn't It possible this is Excavator which will be used instead of steamroller module? Kaveri was already delayed can't this be the reason or something?
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  #906  
Old 05-26-2013, 07:20 AM
Tora Shin Tora Shin is offline
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Indeed. That looks nothing like what's detailed on anandtech:
http://www.anandtech.com/show/6201/a...r-architecture
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  #907  
Old 05-26-2013, 08:22 AM
inf64 inf64 is offline
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The only odd thing is the FP unit section. Everything else lines up with what AMD presented at HC last year. Note that AMD also recently updated the 15h SOG to include a reference for FP256 and native 256bit operations done on full 256bit pipelines in the FP unit. Whether this has anything to with SR core (or it's for EX core) is unknown. The timing of the update is conspicuous and it usually is related to yet unreleased future iteration of present core (which SR is compared to BD/PD).

Maybe there is a chance that Kaveri1 was basically scrapped and we got a pulled in souped up Kaveri2.0 (or if you want, Excavator) with full width native 256bit SIMD pipelines. It makes sense since Kaveri1 was supposed to be taped out looong time ago and we had nothing of it.Now we see all these references to Kaveri2.0 (lead project managers @ AMD listing it on their Linkedin resumes) and we finally have updated 15h SOG. We also have a mention of 4-6 SR cores in that other non public manual that BSN had access to (along with the developers who singed the NDA). Looks like Kaveri2.0 might be something more than Kaveri1 and that the change and timing have something to do with both AMD's recent change in leading people who sit behind these projects and their possible competitive positioning in mainstream/performance desktop,mobile and server ("SR2.0" core and APU based on it is going into APU Opterons this year,supposedly).

Interesting times ahead.
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Last edited by inf64; 05-26-2013 at 08:29 AM.
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  #908  
Old 05-26-2013, 02:09 PM
sdlvx sdlvx is offline
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Does everyone really think AMD would have said everything about the chip a year ago?

Given how Read is executing, he should be smart enough to realize that Intel in servers and desktop is a dead end. P6 can't be evolved much and every tock is yielding smaller and smaller IPC increases. AMD is sitting on a brand new micro-arch with lots of "low hanging fruit", to but it nicely, and P6 derived Haswell is like a giant tree with a single apple at the very top that no one can get to.

I am skeptical of Intel's focus on iGPU and power consumption, meaning I feel that it's something they've turned to as marketing points because they simply can't make Haswell any faster. AMD might be aware of this and they might realize that they are trading blows in multi-thread, about 40% slower single worse case, and have a ton of room for improvement.

There's demand, take a look at the average enthusiast forum. They want more cores, better performance, etc. They are the kind of people who will buy new, expensive hardware and then find ways to use it, and then they make that the cool thing and then people want to upgrade to do the cool thing. Streaming games and stuff is something that comes to mind where this has happened, and you can see it with the exploding popularity of twitch.tv and other game streaming sites.

The whole "there's not enough software to use new hardware!" is just a bunch of FUD to justify a lack of performance increases. If we really were at a point where hardware had totally caught up, there would be no demand for HSA, CUDA, OpenCL, or any new Intel, Nvidia, or AMD products.
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  #909  
Old 05-26-2013, 05:25 PM
astrovasilis astrovasilis is offline
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WIth the two decoders we say that there will be a 20% more performance when two threads are in the module.
When there will be one thread in the module that will be the IPC increase from those things that you say; About 10%; When the module executes one thread the existance of two decoders i think is not significant. So we can say that SR will have the IPC of Phenom II;

Last edited by astrovasilis; 05-26-2013 at 05:28 PM.
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  #910  
Old 05-26-2013, 05:50 PM
itsmydamnation itsmydamnation is offline
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Quote:
Originally Posted by astrovasilis View Post
WIth the two decoders we say that there will be a 20% more performance when two threads are in the module.
When there will be one thread in the module that will be the IPC increase from those things that you say; About 10%; When the module executes one thread the existance of two decoders i think is not significant. So we can say that SR will have the IPC of Phenom II;
no you cant, they have improved L/S , L1D, L1I, prefetchers and branch prediction, all of those (except maybe L1I) improve single thread performance.


Quote:
Does everyone really think AMD would have said everything about the chip a year ago?
they did with bulldozer, piledriver, bobcat and jaguar, tell me why SR is any different.
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