And We’re Back…

It’s the S|A Weekly Roundup!

Flaming WaferIt’s been a busy week for a few companies. Lots of things are going on at AMD, as well as a few over at Intel. Nvidia’s been pretty quiet lately, and Nintendo took an absolute beating in Q2. You may have noticed the absence of the roundup for the past few weeks, we apologize for the interruption. But I am happy to report that you’ll be seeing an return to normality in the near future, provided the unicorns don’t have another panic attack…

Jarred Bell of Anandtech posed the entertaining question of the week. Is it worth buying the high-end DDR3 for your shiny new Sandybridge based pixel crunching monster? Long story short, don’t even bother. As it turns out, and as we saw with most of the last generation platforms, higher speed RAM is pretty much pointless after a certain level of speed and lack of latency is reached. At this point, the only thing that can really make the RAM market interesting again is the creation and adoption of new technologies. But don’t get your hopes up for that kind of an event soon.

Oh, look at that, an upcoming 16 core CPU has lower base clock speeds than an eight core CPU.  I can’t believe it! Oh, wait… Is that really news? Meh. Then again Xbit published a story on it, so it must be. That said, the base clocks on these parts look to be equal to or greater than the clocks of AMD’s current generation 12-core parts.

Two new leaked slides popped up this week. One of which reaffirmed AMD’s competitive position for the year, and the other which detailed AMD’s high, mid, and low end platforms for next year. Aren’t these slides just the greatest? I’ll spare you the previously released information that made up the major portion of these slides and focus on the two new details worth remembering for later. First up the code name for next year’s high-end platform is Corona. It’s not a very aggressive name, considering that the code name of the CPU core it uses is Piledriver, but it seems to add bit of elegance to a platform designed for doing brute force work. The second bit is codename “Yuba” FCH (Fusion Controller Hub) which is integrated into the upcoming low end Wichita APU and replaces the off-die FCH found on the current generation Brazos platform. We’ll probably have to wait for quite a bit yet to find out if AMD has created the first Fusion APU that’s also a complete SOC, but things look even more promising for AMD in the low end than they did this year.

Extremetech reaffirmed what we all knew it the first place. Their articles are a bitter joke and testament to the power of Intel’s new propaganda machine. And before you try and defend them, let me show you what I mean.

“Intel, with a move that will likely take a little wind out of AMD’s heterogeneous computing sails, has detailed a new form of anti-aliasing that can be done in real time on the CPU.” – Extremetech’s Sebastian Anthony

Okay, so Intel is sticking it to AMD via technical innovation in the graphics arena? This could be entertaining…

“Called morphological anti-aliasing, or MLAA, it is actually nothing like the anti-aliasing you’ve come to expect from MSAA or FSAA.” – Extremetech’s Sebastian Anthony

Is this a joke? I’m mean seriously, was this guy spoon fed a press release by Intel? Really? For those of you who fail to see why this article is so egregious let me direct you to one of S|A’s own articles on this subject. Please note the date that the article was published. Now how long ago did AMD introduce MLAA? Oh, yeah, with the launch of the 6800-series in October of 2010. That was 10 months ago. Plus they skipped over all the academic research done on MLAA previous to that point. Did these guys do any research before they wrote this article? I’m mean if they’d just bothered to google MLAA they would have found that the first link is a discussion of what MLAA is, from the day after the 6800 series launched, ten months ago, and that the fifth link down goes straight to AMD web page on what MLAA is and why you’d want to use it.

The one interesting factoid in the article is that Intel’s implementation is CPU based, but then again does that really surprise anybody? I don’t see Intel’s use of MLAA hurting AMD in the slightest, if anything it legitimizes MLAA in the eyes of developers. So again I pose the question, is this article a joke? PRO TIP: If you’re going to write a puff piece, at least make sure that you look both ways before you publish it.

It appears that AMD’s Fusion products have been taking market-share from Intel in the desktop and mobile segments, with some modest gains in both. But AMD’s server segment is still in a nose dive, and Bulldozer based parts can’t seem to come soon enough. Look for more gains by AMD in the mobile and desktop sectors in Q3, with a smaller loss or holding pattern due to Interlagos and Valencia.

AMD released its 11.7 WHQL and it’s 11.8 Preview driver set this week. The 11.7 driver seems to be mostly focused on bug fixes, while the 11.8 driver improves performance in a number of areas. The end of the upper right hand cursor issue and a 30 percent increase in MLAA performance definitely add to the usefulness of these two new driver sets.  You can pick up the 11.8 Preview driver here.

Eric Bleeker of the Motley Fool managed to get an interview with Nvidia’s VP of Business Development and question him briefly about Nvidia’s recent acquisition of Icera. As many had guessed Nvidia’s using Icera’s current client base to extend sales of its Tegra line of ARM chips and using its current Tegra clients to extend the sales of its newly acquired  Icera baseband chips. It appears that Nvidia does see a single chip combining the two products appearing at some point in the future, but not anytime soon.S|A

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Thomas Ryan is a freelance technology writer and photographer from Seattle, living in Austin. You can also find his work on SemiAccurate and PCWorld. He has a BA in Geography from the University of Washington with a minor in Urban Design and Planning and specializes in geospatial data science. If you have a hardware performance question or an interesting data set Thomas has you covered.