Last week at XDF, Xilinx announced a major tool suite upgrade called Vitis for their FPGAs. SemiAccurate thinks this is a great advance for users, the free and open parts just add to the goodness.
Lets start out with what Vitis is and what it isn’t. As you know Xilinx has long had a suite of low level design and synthesis tools called Vivado. On top of that there were lots of software, tools, libraries, and other code, some internal, some external. Due to the specialized nature of FPGAs and how they are programmed, Vivado wasn’t exactly something you teach a beginner. Even if things have come a long way in recent years, low level FPGA programming is not for the feint of heart.
The old goes to the new
What Vitis does is take everything on top of Vivado, the OSes, the libraries, the tools, and all the rest, and roll them up in to one approachable package. Actually it isn’t something you really use directly, Vitis plugs in to most modern compilers like Visual Studio, GCC, and others so you just use what you have and what you know. It still sits on top of Vivado however, and you can still use those tools if you want.
Under the hood you map the inputs and outputs of the code to the Xilinx devices and interfaces output by Vitis, then off you go. The theory is that you don’t really change your code, just recompile and run. In the real world things are rarely so simple but given what Xilinx showed us and because it plugs in to the tool suites you are already familiar with, the painful bits look to be seriously minimized if not eliminated.
And it is all free. That is free as in freedom, free as in beer, but not free as in puppy, a good thing in this case for the last one. You can see the details on Xilinx’s Vitis page and the full suite should be available for anyone who wants to play with it in about a month. The interesting part is not just the tools however, it is the rest of the goodies that come along with it, mainly the domain specific libraries.
As you can see on the top level of the diagram above, there are six groups of libraries that are all very useful to most modern workloads. All of these libraries, and undoubtedly more to come are also included, free, and obviously optimized for Xilinx hardware. If you need optimized CV code for the smart edge camera you are developing, this will save you a lot of time and headaches. If you want to add a bit of smarts to it, plug in the AI code (soon anyway).
Vitis library functions
There are a claimed 400+ functions across eight libraries at the moment, all of which seem to fall in to the category of, “quite useful”. If you are developing hardware or devices, the functions here will get you up and running quite fast. Since it is all open source you can also tweak them to your liking, port them to your final hardware if that is the route you choose to go, or just use them as is without paying a huge fee for the privelage. When you are done compiling, Vitis effectively gives you a bunch of APIs that you can call from your higher level code via the mapping we talked about earlier.
On the AI front there are currently 30+ models on Github, all licensed under the Apache 2.0 license. The way Vitis sets up the FPGA, if there is a newer model or one more appropriate for your workload, you can swap to a different DSA in seconds without disrupting the rest of the device. This is useful not just for the seemingly monthly change of AI algrorithms, it is a boon for different types of workloads on the same device. It isn’t hours or minutes to update the code anymore, it is seconds if you do it right. Vitis seems to automate that part well enough.
In the end the change from multiple tool suites running multiple different interfaces to Vitis is about as large as you can get. Vitis plugs in to the tools you know, maps interfaces to what you have and need, and rolls it all up in to a single free package. To us the library list is the impressive part, and with the free aspect of the suite, it is something that is sure to grow.S|A
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