Intel talks a little more about Quark

Updated: Not P54C based but still makes no sense

Intel - logoIntel spilled a few more details about the Quark X1000 SoC recently but sadly most of our questions went unanswered. That said a few more bits and pieces were filled in but they were more trivia than substance.

First off there is one correction from our last article on Quark, SemiAccurate said it was based on a P54C core because we were directly told that by an Intel manager involved in the program. It turns out that Quark is based on a 486 even though it is directly described as a “Pentium ISA Compatible -IA design”. How did Intel achieve a P5 ISA on a 486? Easy they added the handful of instructions to the old core while they ripped and replaced just about everything else.

What did they add? Obviously the few new instructions on the P5 but not in the Pentium MMX generation. On top of that PAE and large page support was added along with local APIC style interrupt support. Fans of the 486 microarchitecture may recall that there was little in the way of modern debug capabilities in that generation. Intel added a bunch of software and hardware counters but nothing that will match a modern mainstream CPU. That said things should be enough for the job at hand and certainly much better than a real 486.

The Quark designers did start out with a 486 design and promptly threw most of it out. Most of it is a new core but some bits were actually carried over. Why start with a 486 rather than a Pentium if you throw most of it out before adding in all the new ISA bits but not the architectural advances that the P5 line brought to the table? Easy, power. The 486 uses less while providing the performance Intel had targeted. On top of this more traditional C-State support that is much better than the 486 could dream of but nowhere near a modern CPU was added to the Quark core.

For construction the core is fully synthesizable and built on a 32nm process but Intel wouldn’t say exactly which one, the mainstream CPU process or the LP/SoC variant. It would be rather silly not to use the SoC process though. When asked about core size and die size, Intel repeated the same rather disingenuous talking point “number” of 1/5th the core size of a Silvermont core if it was built on a 22nm process.

Update Nov 3, 2013 @ 9:45pm: Intel clarified the process Quark is on, it is 32nm SoC like we thought. Sorry about the potential confusion.

While this is undoubtedly true their reticence to even hint about how big a core and die that is for sale on the open market is very telling. If Intel was even remotely competitive on either front they would be shouting it from every rooftop and sliding us ‘background’ numbers about their advantages. They are shutting up though, read in to that what you will.

The last part is how Intel ties a 486 core, albeit a very high clocked one, in to a system with PCIe, USB, and several other tech bits that showed up a decade after the 486 was unquestionably passe. The short version is that Intel took the “rudimentary front side bus” that was in the chip and threw it out. It was replaced with a “better bus” of unspecified capabilities. SemiAccurate has seen diagrams that have five relevant blocks on it starting with a CPU Core connected to a Bridge. That Bridge is connected to a Legacy Bridge, PCIe, and AMBA Fabric.

If you are not up on modern SoC or microcontroller busses, AMBA is the bus from a small company in a far off land called ARM. Yeah Intel put an ARM bus on a 486 and won’t talk about it in public just like the ARM cores in their LTE modems. I guess ARM must be small enough to ignore in the market Quark is aimed at, their market share only has 4-5 more zeros in it than Intel. That said AMBA is unquestionably the right move for Quark, it allows them to add any ARM focused IP to the mix.

So the idea is that Quark is synthesizable, smaller and more power efficient than Atom, and built on a much more modern process. The ARM AMBA bus allows them to add a wealth of customer IP with one little problem, x86 and ARM are different as far as endian-ness is concerned. While this is fixable with a little bit of wiring, AMD did it years ago with FSA/HSA, it may cause problems for some types of code. Either way it is definitely the right thing to do.

At the end of the day there is one question that remains, the one SemiAccurate brought up previously about cost. This is a 32-bit 32nm chip that costs, “$5 and up” and is aimed squarely at a market where everyone says that 65nm is overkill and similar performance is available now for $1.80. These later numbers were then modified with, “$1.80 if you really want to spend a lot, you can do it for far less if you don’t want to overspend”. Another caveat is that SemiAccurate was under the impression that Quark was about 50% faster than it turned out to be at the time so that $1.80 is really overkill.

Intel says Quark is synthesizable and strongly intones that Quark is meant to have third party IP added. While Intel won’t even hint at the prices they are charging foundry customers for a wafer, background numbers SemiAccurate has heard are borderline laughable and even a small fraction of that number would price Quark out of any relevant market.

Similarly mask costs for making even the most minute addition to the core would similarly add millions of dollars to the production costs at a bare minimum. In a market with far sub-$2 competition, adding a few million dollars means that if you only sell a few million units, doing it with Intel would cost more in mask subsidies than the competition costs. Then again do you know of any market with volume in the millions that really needs an x86 based microcontroller? Me neither.

To their defense, Intel did directly say that this was considered during the project’s planning and the nebulous phrases about fab cost reductions were bandied about. Once again cost reduction sounds great but the lack of anything even resembling specifics here leads us to believe that it is as real as the Easter Bunny. The competition is on 65nm, 90nm, and even 130nm which have vastly lower costs to do everything. Intel is using an overkill process that costs a lot and brings absolutely no benefit for massively more money.

In the end Quark is still a really neat intellectual exercise. Most CPU forums are filled with talk about Star Trek physics and what if you built a 486 on a modern process type questions. Now we know some of the answers but the specifics are hidden to the point where we are sure that if Intel ever decides to actually answer a direct question, the answer will be underwhelming.

On a financial side though this project is far beyond DOA, it just makes no sense. It is built on the wrong process that adds vast expenses and adds nothing worthwhile. It is synthesizable but actually doing so utterly breaks any economic potential that adding IP brings. Worse yet Intel is bringing an alien ISA to a market that has several entrenched and better suited options that don’t require a new learning curve. There is no up side to Quark that SemiAccurate can see, don’t expect the line to be around in a few years.S|A

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Charlie Demerjian

Roving engine of chaos and snide remarks at SemiAccurate
Charlie Demerjian is the founder of Stone Arch Networking Services and is a technology news site; addressing hardware design, software selection, customization, securing and maintenance, with over one million views per month. He is a technologist and analyst specializing in semiconductors, system and network architecture. As head writer of, he regularly advises writers, analysts, and industry executives on technical matters and long lead industry trends. Charlie is also a council member with Gerson Lehman Group. FullyAccurate