AMD (AMD) is going to out the details of it’s next generation ‘Southern Islands‘ GPU family at a very unlikely place, the Fusion Developers Conference this June. There are a lot of goodies at that conference, and even a hardware focused geek will find a lot to do there.
Sometime in the last day or two, AMD just massively updated the web site for their Fusion Developer Conference, and outed all the details. The talks are mostly software focused, but there are enough hardware focused talks to be more than interesting, including one of the keynotes. We interpret the stealth launch to mean some people on the inside are trying steer the free 6870 card given to early registrants to their friends before noise is made publicly.
Chronologically, the last keynote by Eric Demers, CTO of AMD’s Graphics Division looks to be the most exciting. He is giving a presentation about the history of programmable shaders, and how they evolved, and where they are going. The nice part is how the description ends, Eric will “also present an overview of the next generation of AMD cores under development.” I wonder what that could mean, SI or something more exCIting? Certainly not EMACS. Inside joke, don’t ask.
The other two keynotes, Microsoft’s Herb Sutter and AMD’s Phil Rogers are much more software focused, but as usual, there are likely to be bits of interest to us semiconductor folk. They talk about programming and languages, but probably have far fewer inside jokes.
Reading the list of talks, they mostly fall in to the usual and expected categories, image processing, compression, and a few scientific areas well known to be amenable to GPGPU architectures. No shocks there. One category that I was not expecting was the half-dozen or so talks about database acceleration on GPUs. This includes standard SQL type stuff, but there are also talks on Hadoop and MapReduce. I wonder who *COUGH*Google*COUGH* would be interested in this kind of thing?
Back to the hardware side, three talks pop out at me. The first is a deeper dive into Phil Rogers’ keynote, it is entitled “The Fusion APU Architecture – A Programmers Perspective”. It covers one of the hotter topics out there in heterogeneous programming, basically what code to execute on the CPU vs the GPU, and the trade-offs that come from those choices. There ought to be some interesting nuggets in that talk.
Then comes one titled, “Physics Simulation on Fusion Architectures”, how Fusion type architectures affect physics simulation. If you recall back when physics on the GPU was being first over-hyped, the people over-hyping it curiously neglected to point out some of the massive flaws with this approach. One of the biggest ones was that certain classes of physics calculations could not be done on the GPU with anything resembling speed, but others simply flew.
Between the over-hyping and under-delivering, we ended up with nothing more than eye candy for physics despite the fervor of those with a vested interest. For the most part, physics was and still is being done on the CPU, and it is still faster that way. Fusion has the potential to break the barriers that turned GPU physics into a marketing ploy, it will be interesting to see if works that way in practice.
From there, a talk about AMD’s GPU JIT will probably reveal a lot about how things are done, and what the hardware capabilities are. JITing works better if some specific hardware functions are available to it, and how those work in detail is not often talked about. It could be cool if you enjoy hearing about the low level functions like, well, most sane people don’t.
Similar to this is one session on GMAC, a model that provides a single address space for the CPU and GPU even though the hardware does not physically support that. Depending on how it is implemented, it could be either ‘holy grail’ or slow, but it probably will be interesting. In a related talk on the other hot topic of the moment, “Multi-GPUs, OpenCL, and Graphics Programming”, sharing compute between Fusion and a GPU, will be addressed.
If only AMD would hurry up and do a seamless multi-GPU OpenCL implementation, all would be right in the world. Actually, a seamless multi-CPU and multi-GPU OpenCl implementation that correctly parses tasks to the correct execution unit taking latency, execution times, and energy efficiency into account would be needed to make the world right, but the multi-GPU bit is a good start. Think “I like ice-cream” for the former, “World peace” for the latter, but both are still good things.
Last up is the kicker that made us want to go to the Fusion Developer Summit, talk 2620 titled, “AMD Graphics Core Next”. The speakers, Mike Houston and Mike Mantor, are the right people to do this, and it will undoubtedly go in to much more detail than Eric Demers’ keynote. Southern Islands may have taped out, but this is where you will likely see silicon first. See you there.S|A
Latest posts by Charlie Demerjian (see all)
- More on Intel’s 10nm process problems - Sep 17, 2018
- Intel puts out another 14nm 2020 server platform - Sep 11, 2018
- Why Can’t Intel Supply Enough 14nm Xeons? - Sep 10, 2018
- Intel can’t supply 14nm Xeons, HPE directly recommends AMD Epyc - Sep 7, 2018
- AMD reintroduces the Athlon name with two CPUs - Sep 6, 2018