Intel normally launches a new CPU family in the fall, starting with the high end parts. The Nehalem + X58 line was outed in the fall of 2008, and the high end Westmere CPUs were a bit tardy, breaking cover at CES in 2010. A month or two is not a big deal, hardly a slip worth talking about, especially at Christmas.
Then comes the Sandy Bridge launch at CES in 2011, and it started with the mid-range parts, as exemplified by the meaningless numbers Intel decided to randomly generate for this new crop. The high end/enthusiast parts, aka Sandy Bridge-E, were nowhere to be seen. In the 6+ months since CES, there have only been the occasional sighting of systems backed by little other than rumors. Something was up.
Early in the year, the rumors mostly surrounded the server variants, something that the desktop Sandy-E is a re-branding of. They all more or less said that Sandy-E was not coming out because there was more or less no need in the market for it. AMD was, and still is, being decimated in the server space, and has little chance of catching up soon, so why rush out a new part? This was quite plausible.
That said, having seen several Sandy-E systems this year at various shows, the state that they were in left a lot to be desired. Launch was months away, and seems to stay that way, so plenty of time to fix any issues that remain. Recently, there have been some more rumors of slips, from late Q3 to Q4, and some are now suggesting Q1/2012 for Sandy-E.
Some rumors say that the desktop versions are coming out in Q4, but only the server variants have slipped to Q1. Yet more rumors say the launches are the other way around, maybe. One thing they all say is that the problems are with the PCIe3 portion of the chip.
One set of rumors say that the chips are having serious difficulty with PCIe3 cards, GPUs specifically. This could be a plugfest compatibility revelation, or it may be more theoretical, but that particular issue is mentioned more and more often. A different but similar rumor suggests that the problem lies with the Patsburg chipset, and PCIe3 in relation to that.
Since Sandy-E has PCIe3 on die, we are not sure how Patsburg ties in to this, but one likely scenario is that the problem is in the communication between two Patsburg chipsets in dual chip systems. Intel had serious problems getting Nehalem servers with two south bridges out the door, so is this a replay of that? Another possibility is that Intel uses a PCIe3 variant to connect the CPU and south bridge. DMI and CSI are basically PCIe2 physical layers with proprietary overlays, but don’t look for Intel to ever admit this.
Some sources suggest compatibility problems, others suggest performance problems, but it could be both too. One way of fixing problems of this nature is to work around them, IE stopping direct communications between two points and using an indirect workaround. Think of it as a cut-through vs store and forward networking, one is fast, the other is easer to implement. This may or may not be an acceptable solution to customers, depending on their usage model more than anything else.
Whichever of these problems, if any, turns out to be delaying Sandy-E, one thing you can say for sure is that the chip is a year late so far, and slipping further. Intel is most likely going to get Sandy-E out the door just before Ivy Bridge launches, something that doesn’t look very good for the company. This doesn’t hurt Intel’s bottom line, mainly because there is no real competition for the company in the server space. The real problem is the increasing frequency of major stumbles and delays like this. It is not a good sign.S|A
Latest posts by Charlie Demerjian (see all)
- Intel shows off 10nm 112Gbps SerDes - Mar 12, 2019
- Intel releases Compute Express Link spec - Mar 11, 2019
- Qualcomm rolls out a second gen 5G modem called X55 - Feb 19, 2019
- What is Intel’s Foveros tech and what isn’t it? - Feb 11, 2019
- Why SemiAccurate called 10nm wrong - Jan 25, 2019