Everspin is pushing MRAM into new but old form factors, this time Quad SPI serial RAM is the focus. What is interesting about the new announcement is that it is both slower and less dense than their current offerings.
If you are not familiar with SPI, it stands for Serial Peripheral Interface, Quad-SPI has four I/Os instead of one hence the prefix. Everspin’s entry in to the field is a 1Mb part that runs at 104MHz and can do 52MB/s read and write simultaneously. While you are probably not floored by these numbers in the world of TFlops and Multi-GB GPUs, this is actually a decent step forward in the embedded market that buys lots of memory like this. Not only that, they need high reliability and performance at times in some pretty harsh environments. This market may not be glamorous, but since devices that use SPI memory run large parts of the world, it is quite important.
On the technical side, these devices are Toggle MRAM, not the Spin Torque MRAM used in the DIMMs we wrote about earlier. ST-MRAM was built on a 90nm process, the Toggle devices are on 180nm but can be shrunk to 130nm for the upcoming 4Mb devices. Everspin representatives said that 16Mb devices would be a good fit for either technology but above that density, ST is the best fit, Toggle below. With that in mind, for things like engine controllers and smart meters needing non-volatile memory with 20+ year retention times but not much space, Toggle MRAM works out well.
When we asked Everspin why they bothered to engineer this type of product, the answer was simple, customers wanted it. Other competing technologies like NOR flash may not be fast enough, battery backed DRAM has maintenance and lifetime concerns, but MRAM does all of it. It is fast enough for execute in place or self-modifying code too, not very common for SPI devices. For many applications, the added cost of an MRAM is more than made up for by TCO, the performance is just a plus. If people would pay for a solution like this, Everspin would be quite happy to make make it for them. Think basic business rather than scientific breakthrough on a fundamental problem.
Overall the technology here isn’t anything amazing, it is a 1Mb NV memory chip built on a 180nm process, stone age stuff in the 22nm FinFET world. On the other hand, it shows how bleeding edge technologies can backported to older form factors to bring better performance, decrease TCO, and make money too. Applying new tech like this is actually not that common an occurrence either, can you think of the last time you saw this happen in a volume product?S|A
Latest posts by Charlie Demerjian (see all)
- CPU startup Nuvia breaks cover - Nov 15, 2019
- A new high end GPU just taped out - Nov 15, 2019
- Another Epyc Rome TCO data point comes out - Nov 12, 2019
- What is the name of Intel’s Cascade Lake +5 server? - Nov 9, 2019
- AMD launches Threadripper 3, 3950X, and Athlon 3000G - Nov 7, 2019