Napatech was showing off a smart 100GbE adapter at Cisco Live, think full speed 100Gbps packet twiddling. As you can probably guess, this is no mere NIC, it is programmable too, quite the trick at these speeds without crippling latency.
On the surface, the Napatech NT100E3-1-PTP is a 100Gbps CFP4 port supporting 1310nm LR4 single mode fiber. From there it adds IEEE 1588-2008 time sync ports for time stamping packets, a must for some markets like finance. The card has a TDP of 75W but it sports a 6-pin PEG port too, some thing that may seem unnecessary seeing as the PCIe3 16x interface can supply that. The market for 100Gbps adapters tends to be one that has a thing for reliability too, so think of the PEG as insurance or at least peace of mind.
The card in question is not a GPU
From there things get interesting starting with a Xilinx FPGA backed by 8GB of DDR3. That memory has ports pre- and post-FPGA so the NT100E3-1-PTP can capture up to 300ms of raw data at line speeds or store it after FPGA twiddling. In any case the FPGA is more than powerful enough to do a fair amount of tweaking to those packets at full wire speed. All this can be pushed out to a maximum of 32 CPU cores while taking about 5% of one core for overhead.
That FPGA is of course fully programmable and there is a fair amount of software out there from Napatech for various industries. Supporting 100Gbps is no easy task in and of itself, but doing it with lots of code running and shifting that to 32 cores is seriously impressive. Then again the markets that Napatech is targeting needs all this and more, the NT100E3-1-PTP is a good place to start.S|A
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