Intel announced today what we wrote up a month ago, their 22nm process is going to use FinFETs. It also sounds like we were wrong about it being cache only as well.
Intel is calling this ’3D’, which it is, but that isn’t really the point. The idea is to take the transistor and turn it 90 degrees so it sticks up instead of being flat. The space savings allows you to to put three of the gates in, which has a lot of benefits for speed and leakage reduction. ’3D’ FinFETS are being touted by Intel as the greatest thing since sliced bread. They aren’t. They are simply another manufacturing challenge that Intel has overcome both first and well. Congrats to them there, the ~2 year lead they have on the rest of the industry just got longer.
On a technical side, they are not talking about size savings, just that they are getting the standard 50% size reduction. Intel is however claiming that performance is way way up, and that appears to be true. The claim is that Tri-Gate will be up to 37% faster than the current 32nm process, and it can also operate at a much lower voltage, about .2v lower than 32nm. Combined, Intel is claiming greater than 50% power reduction with only 2-3% higher cost compared to a 32nm planar wafer. Basically Moore’s Law continues.S|A
Latest posts by Charlie Demerjian (see all)
- Intel, Altera, TSMC, and the sad, sad state of tech reporting - Mar 6, 2014
- Sandisk shows off two SD cards, an embedded SSD, and a wafer - Mar 6, 2014
- Analysis: Facebook places a large microserver order - Mar 6, 2014
- Kingston gets in to the accessory business with HyperX cloud headphones - Mar 5, 2014
- Nvidia’s Tegra K1 draws a shocking number of Watts - Mar 5, 2014