AMD finally made their bid for Xilinx official yesterday to the confusion of the financial world.
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It looks like Xilinx’s Versal ACAP chips are going to complete Samsung’s 5G base station offerings.
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Today Intel is claiming the world’s largest FPGA, the Stratix 10 GX 10M, is in early sampling.
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Last week at XDF, Xilinx announced a major tool suite upgrade called Vitis for their FPGAs.
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Last week Intel released their Stratix 10 FPGA after the world’s longest chip validation program.
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Xilinx recently released the world’s largest FPGA, the 16nm VU19P with more than 9M logic cells. This third generation ‘worlds largest’ is based on their familiar SSI tech which is what SemiAccurate is most interested in. When you think about …
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At Xilinx XDF 2018, Nallatech/Bittware was showing off some liquid cooled FPGA boards for those who need really high performance compute.
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Intel’s trend of increasingly less credible press releases accelerated yesterday when they “Unveiled” an FPGA with HBM2 memory
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ARM is announcing their lead partner for 7nm Artisan IP and it is none other than Xilinx.
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ARM, Qualcomm, AMD, Xilinx, Huawei, IBM, Mellanox, and Xilinx all agree on CCIX interconnects.
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Everspin and Northwest Logic have teamed up on and FPGA based DDR3 controller supporting ST-MRAM.
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At Hot Chips this year, Xilinx gave a good talk on the problems with electrical and optical backplanes, and what the options are to deal with some thorny impending problems.
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There is a lot of talk about the benefits of chip stacking, but only one company is doing it in volume, Xilinx.
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The three most pressing problems of modern silicon design, power, I/O pins, and yields can all be addressed by chip stacking.
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Hot Chips 24 had their usual tutorials on the first day, and this year the second topic, chip stacking, was of particular interest to SemiAccurate.
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